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QuickLogic (QUIK) and PQSecure pair on reprogrammable post-quantum security for SoCs

In focus: a collaboration between QuickLogic Corporation (NASDAQ: QUIK) and PQSecure that puts reprogrammable post-quantum cryptography inside system-on-chip designs using QuickLogic's embedded FPGA fabric. PQSecure's IP maps directly into that eFPGA block, letting chip designers update or swap cryptographic algorithms in the field after silicon has already shipped. The arrangement addresses a real problem in chip design: locking in a specific cryptographic implementation before the underlying standards have finished settling.

By Owen GallagherMacro DeskJuly 18, 20262 min read
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Key takeaways

  • QuickLogic (NASDAQ: QUIK) and PQSecure are collaborating to embed reprogrammable post-quantum cryptography inside SoC designs using QuickLogic's embedded FPGA (eFPGA) fabric.
  • PQSecure's post-quantum cryptographic IP maps into the eFPGA block, letting designers update or swap cryptographic algorithms in the field after silicon has shipped, turning an algorithm change into a firmware update rather than a hardware revision.
  • The approach is pitched as a way to avoid costly silicon re-spins, since the cryptographic logic stays reconfigurable after a chip leaves the foundry.
  • The announcement discloses no financial terms, customer names, or design-win counts.
  • Investors are advised to watch for licensing agreements tied to specific SoC programs or design-win disclosures confirming PQSecure IP has moved into committed, active silicon pipelines.

In focus: a collaboration between QuickLogic Corporation (NASDAQ: QUIK) and PQSecure that puts reprogrammable post-quantum cryptography inside system-on-chip designs using QuickLogic's embedded FPGA fabric. PQSecure's IP maps directly into that eFPGA block, letting chip designers update or swap cryptographic algorithms in the field after silicon has already shipped. The arrangement addresses a real problem in chip design: locking in a specific cryptographic implementation before the underlying standards have finished settling.

The technical claim

QuickLogic, a San Jose-based developer of embedded FPGA Hard IP, provides eFPGA fabric as a reconfigurable logic block embedded within a larger SoC. PQSecure's post-quantum cryptographic IP occupies that programmable fabric, meaning the security layer sits in logic that can be rewritten after tapeout. That separation of algorithm from silicon is what distinguishes this from a standard fixed IP integration. An algorithm change becomes a firmware update rather than a hardware revision.

The re-spin argument

Both companies center the case on avoiding silicon re-spins. A re-spin means returning to a fab for new masks and another wafer run, and the cost accumulates quickly when the trigger is a security requirement rather than a new feature. The eFPGA approach sidesteps that cycle because the relevant logic stays reconfigurable after a chip leaves the foundry. For SoC designers, a cryptographic update pushed through software carries a meaningfully different cost and schedule profile.

What to watch

The announcement does not disclose financial terms, customer names, or design-win counts. Investors in QUIK watching for commercial traction will want to see licensing agreements tied to specific SoC programs, or design-win disclosures that confirm PQSecure IP has moved from reference availability to committed silicon in active pipelines. The physical handoff from paper specification to production wafer is where this kind of technology case either builds credibility or stalls.

About this story

Filed by the macro desk of MarketPR on July 18, 2026. Source: MarketPR. Indicative figures are not investment advice.

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Frequently asked

What does the QuickLogic and PQSecure collaboration do?

It places PQSecure's post-quantum cryptographic IP into QuickLogic's embedded FPGA fabric within an SoC, enabling reprogrammable cryptographic security that can be updated after the chip has shipped.

Why is putting cryptography in eFPGA fabric significant?

Because the logic can be rewritten after tapeout, it separates the algorithm from the silicon, so a cryptographic change becomes a firmware update instead of a hardware revision.

How does this help avoid silicon re-spins?

A re-spin requires returning to a fab for new masks and another wafer run; keeping the cryptographic logic reconfigurable after the chip leaves the foundry lets designers push updates through software instead.

What financial or commercial details were disclosed?

None—the announcement does not reveal financial terms, customer names, or design-win counts.

What should investors watch for going forward?

They should look for licensing agreements tied to specific SoC programs or design-win disclosures confirming PQSecure IP has moved from reference availability into committed silicon in active pipelines.